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1 for more information www.linear.com/ltc3245 typical applicat ion features description wide v in range, low noise, 250ma buck-boost charge pump the ltc ? 3245 is a switched capacitor buck-boost dc/dc converter that produces a regulated output (3.3v, 5v or adjustable) from a 2.7v to 38v input. the device uses switched capacitor fractional conversion to maintain regulation over a wide range of input voltage. internal circuitry automatically selects the conversion ratio to optimize efficiency as input voltage and load conditions vary. no inductors are required. the unique constant frequency architecture provides a lower noise output than conventional charge pump regu - lators. to optimize efficiency at the expense of slightly higher output ripple, the device has pin selectable burst mode operation. low operating current (20a with no load, 4a in shut - down) and low external parts count (three small ceramic capacitors) make the ltc3245 ideally suited for low power, space constrained automotive/industrial applications. the device is short-circuit and overtemperature protected, and is available in thermally enhanced 12-pin msop and low profile 3mm 4mm 12-pin dfn packages. efficient regulated 5v output applications n automotive ecu/can transceiver supplies n industrial housekeeping supplies n low power 12v to 5v conversion l , lt, ltc, ltm, burst mode, linear technology and the linear logo are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. 5v out efficiency vs output current n 2.7v to 38v v in range n i q = 18a operating; 4a in shutdown n 12v to 5v efficiency = 81% n multimode operation (2:1, 1:1, 1:2) with automatic mode switching n low noise, constant frequency operation n pin selectable burst mode ? operation n v out : fixed 3.3v, 5v or adjustable (2.5v to 5v) n i out up to 250ma n overtemperature and short-circuit protection n operating junction temperature: 150c maximum n thermally enhanced 12-pin msop and low profile 12-pin (3mm 4mm) dfn packages i out (ma) efficiency (%) p loss (mw) 3245 ta01b 90 70 60 80 50 30 20 40 10 400 300 250 350 200 100 50 150 0 0.1 100 1000 10 1 efficiency p loss v in = 12v c + c ? v in sel2 burst sel1 v out outs/adj pgood gnd ltc3245 v in = 2.7v to 38v v out = 5v i out up to 250ma 3245 ta01a 1f 1f 10f 500k ltc3245 3245f
2 for more information www.linear.com/ltc3245 pin configuration absolute maximum ratings v in , sel1, sel2, burst ............................ C0.3v to 38v v out , outs/adj, pgood ............................ C0.3v to 6v i pgood ...................................................................... 2ma v out short-circuit duration ............................. indefinite (note 1) 12 11 10 9 8 7 1 2 3 4 5 6 gnd c ? v out c + pgood outs/adj v in v in v in burst sel1 sel2 top view de package 12-lead (3mm 4mm) plastic dfn 13 gnd t jmax = 150c, ja = 43c/w exposed pad (pin 13) is gnd, must be soldered to pcb gnd 1 2 3 4 5 6 v in v in v in burst sel1 sel2 12 11 10 9 8 7 gnd c ? v out c + pgood outs/adj top view 13 gnd mse package 12-lead plastic msop t jmax = 150c, ja = 40c/w exposed pad (pin 13) is gnd, must be soldered to pcb gnd order information lead free finish tape and reel part marking* package description temperature range ltc3245ede#pbf ltc3245ede#trpbf 3245 12-lead (3mm 4mm) plastic dfn C40c to 125c ltc3245ide#pbf ltc3245ide#trpbf 3245 12-lead (3mm 4mm) plastic dfn C40c to 125c ltc3245emse#pbf ltc3245emse#trpbf 3245 12-lead plastic msop C40c to 125c ltc3245imse#pbf ltc3245imse#trpbf 3245 12-lead plastic msop C40c to 125c ltc3245hmse#pbf ltc3245hmse#trpbf 3245 12-lead plastic msop C40c to 150c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ symbol parameter conditions min typ max units v in operating input voltage range l 2.7 38 v v uvlo v in undervoltage lockout threshold v in rising v in falling l 2.4 2.2 2.7 v v operating junction temperature range (notes 2, 3) (e-/i-grade) ........................................ C40c to 125c (h-grade) ........................................... C40c to 150c (mp-grade) ........................................ C55c to 150c storage temperature range .................. C65c to 150c lead temperature (soldering, 10 sec) (mse only) ........................................................... 300c the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c, (note 2). v in = 12v, v out = 5v, c f ly = 1f unless otherwise noted. electrical characteristics ltc3245 3245f
3 for more information www.linear.com/ltc3245 electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. this ic has overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperatures will exceed 150c when overtemperature is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. note 2: the ltc3245e is guaranteed to meet performance specifications from 0c to 85c. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the ltc3245i is guaranteed over the C40c to 125c operating junction temperature range. the ltc3245h is guaranteed over the C40c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125c. note that the maximum ambient the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c, (note 2). v in = 12v, v out = 5v, c f ly = 1f unless otherwise noted. temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: the junction temperature (t j , in c) is calculated from the ambient temperature (t a , in c) and power dissipation (p d , in watts) according to the formula: t j = t a + (p d ? ja ) where ja (in c/w) is the package thermal impedance. note 4: v out programming range is from 2.5v to 5v. see the programming the output voltage section for more detail. note 5: the maximum operating junction temperature of 150c must be followed. certain combinations of input voltage and output current will cause the junction temperature to exceed 150c and must be avoided. see thermal management section for information on calculating maximum operating conditions. symbol parameter conditions min typ max units i vin v in quiescent current sel1 = sel2 = 0v v out enabled, burst = 0v v out enabled, burst = v in shutdown, v out = 0v cp enabled, output in regulation cp enabled, output in regulation 4 18 20 8 35 40 a a a v out5_bm fixed 5v burst mode output regulation (outs/adj connected to v out , burst = 0v, sel2 = v in , sel1 = v in ) (note 5) 5v v in < 38v, i out 250ma 4v v in < 5v, i out 150ma 3.3v v in < 4v, i out 75ma 3v v in < 3.3v, i out 45ma l l l l 4.8 4.8 4.8 4.8 5.2 5.2 5.2 5.2 v v v v v out5_ln fixed 5v low noise output regulation (outs/adj connected to v out , burst = v in , sel2 = v in , sel1 = v in ) (note 5) 5v v in < 38v, i out 200ma 4v v in < 5v, i out 120ma 3.3v v in < 4v, i out 60ma 3v v in < 3.3v, i out 35ma l l l l 4.8 4.8 4.8 4.8 5.2 5.2 5.2 5.2 v v v v v out33_bm fixed 3.3v burst mode output regulation (outs/adj connected to v out , burst = 0v, sel2 = v in , sel1 = v in ) (note 5) 5v v in < 38v, i out 250ma 4v v in < 5v, i out 175ma 3.3v v in < 4v, i out 110ma 2.7v v in < 3.3v, i out 60ma l l l l 3.17 3.17 3.17 3.17 3.43 3.43 3.43 3.43 v v v v v out33_ln fixed 3.3v low noise output regulation (outs/adj connected to v out , burst = v in , sel2 = v in , sel1 = v in ) (note 5) 5v v in < 38v, i out 220ma 4v v in < 5v, i out 140ma 3.3v v in < 4v, i out 90ma 2.7v v in < 3.3v, i out 50ma l l l l 3.17 3.17 3.17 3.17 3.43 3.43 3.43 3.43 v v v v v adj outs/adj reference voltage (note 4) sel2 = 0v, sel1 = v in , i out = 0ma l 1.176 1.200 1.224 v r cl load regulation (referred to adj) sel2 = 0v, sel1 = v in 0.2 mv/ma v pg_rise pgood rising threshold v out % of final regulation voltage 95 98 % v pg_fall pgood falling threshold v out % of final regulation voltage 88 91 % v pg_low pgood output low voltage i pgood = 0.2ma l 0.1 0.4 v i pg_high pgood output high leakage v pgood = 5v C1 0 1 a v low burst , sel1, sel2 input voltage l 0.4 0.9 v v high burst , sel1, sel2 input voltage l 1.2 2 v i low burst, sel1, sel2 input current v pin = 0v C1 0 1 a i high burst, sel1, sel2 input current v pin = 38v 0.5 1 3 a i short_ckt i vout short-circuit current v out = gnd 900 ma r out charge pump output impedance 2:1 step-down mode 1:1 step-down mode 1:2 step-up mode (v in = 3.3v) 3 3.5 14 f osc oscillator frequency l 450 500 khz ltc3245 3245f
4 for more information www.linear.com/ltc3245 typical performance characteristics 5v fixed output voltage vs input voltage (burst mode operation) 5v fixed output voltage vs input voltage (low noise operation) 5v fixed efficiency vs output current 3.3v fixed output voltage vs input voltage (burst mode operation) 3.3v fixed output voltage vs input voltage (low noise operation) 3.3v fixed output efficiency vs output current input operating current vs input voltage input shutdown current vs input voltage oscillator frequency vs temperature t a = 25c, unless otherwise noted. v in (v) 0 0 i cc (a) 5 10 15 25 20 35 30 45 40 50 5 10 15 20 3245 g01 25 30 35 40 burst = 0v v out = 5v v out = 3.3v v in (v) 0 0 i sd (a) 2 4 6 10 8 14 12 18 16 20 5 10 15 20 3245 g02 25 30 35 40 150c 125c 25c ?55c temperature (c) ?60 300 f osc (khz) 325 350 375 400 450 425 475 500 ?30 0 30 60 3245 g03 90 120 150 v in (v) 2 4.80 v out (v) 4.85 4.90 4.95 5.00 5.10 5.05 5.15 5.20 3 4 5 6 8 7 9 3245 g04 10 11 14 12 13 15 i out = 0ma i out = 150ma i out = 250ma v in (v) 2 4.80 v out (v) 4.85 4.90 4.95 5.00 5.10 5.05 5.15 5.20 3 4 5 6 8 7 9 3245 g05 10 11 14 12 13 15 i out = 0ma i out = 150ma i out = 250ma i out (ma) efficiency (%) 3245 g06 100 80 70 90 60 40 30 20 10 50 0 0.1 100 1000 10 1 burst mode operation low noise v in = 12v v in (v) 2 3.10 v out (v) 3.15 3.20 3.25 3.30 3.40 3.35 3.45 3.50 3 4 5 6 8 7 9 3245 g07 10 11 14 12 13 15 i out = 0ma i out = 150ma i out = 250ma v in (v) 2 3.10 v out (v) 3.15 3.20 3.25 3.30 3.40 3.35 3.45 3.50 3 4 5 6 8 7 9 3245 g08 10 11 14 12 13 15 i out = 0ma i out = 150ma i out = 250ma i out (ma) efficiency (%) 3245 g09 100 80 70 90 60 40 30 20 10 50 0 0.1 100 1000 10 1 burst mode operation low noise v in = 9v ltc3245 3245f
5 for more information www.linear.com/ltc3245 typical performance characteristics 5v output impedance vs temperature (boost mode) 3.3v output impedance vs temperature (boost mode) output current vs input voltage (v out 5% below regulation) 5v fixed output voltage vs falling input voltage (burst mode operation) 3.3v fixed output voltage vs falling input voltage (burst mode operation) adj regulation voltage vs temperature t a = 25c, unless otherwise noted. v in (v) 2 4.900 v out (v) 4.925 4.950 4.975 5.000 5.050 5.025 5.075 5.100 3 4 5 6 8 7 9 3245 g10 10 11 14 12 13 15 i out = 250ma i out = 1ma ?55c 25c 125c v in (v) 2 3.200 v out (v) 3.225 3.250 3.275 3.300 3.350 3.325 3.375 3.400 3 4 5 6 8 7 9 3245 g11 10 11 14 12 13 15 i out = 250ma i out = 1ma ?55c 25c 125c temperature (c) ?60 0 r out () 5 10 15 20 25 30 ?30 0 30 60 3245 g13 90 120 150 v in = 2.7v v in = 3.3v low noise burst mode operation temperature (c) ?60 0 r out () 5 10 15 30 25 20 35 40 ?30 0 30 3245 g14 60 90 120 150 v in = 2.7v v in = 3.3v low noise burst mode operation v in (v) 2 0 i out (ma) 100 200 300 700 600 500 400 800 3 4 5 6 3245 g15 7 8 9 10 11 12 13 14 5v burst mode operation 3.3v burst mode operation 3.3v low noise 5v low noise temperature (c) ?60 1.180 adj (v) 1.185 1.190 1.195 1.200 1.210 1.205 1.215 1.220 ?30 0 30 60 3245 g12 90 120 150 v out (v) 2.5 0 v in (v) 1 2 7 6 5 4 3 8 11 10 9 12 3 3245 g17 3.5 4 4.5 5 buck ldo falling rising rising falling boost i out = 150ma v out (v) 2.5 0 v in (v) 1 2 7 6 5 4 3 8 11 10 9 12 3 3245 g18 3.5 4 4.5 5 buck ldo falling rising rising falling boost i out = 250ma v out (v) 2.5 0 v in (v) 1 2 7 6 5 4 3 8 11 10 9 12 3 3245 g16 3.5 4 4.5 5 buck i out = 1ma ldo falling rising rising falling boost operating mode transition voltage vs input voltage operating mode transition voltage vs input voltage operating mode transition voltage vs input voltage ltc3245 3245f
6 for more information www.linear.com/ltc3245 pin functions v in (pins 1, 2, 3): power input pins. input voltage for both charge pump and ic control circuitry. the v in pin oper - ates from 2.7v to 38v. all v in pins should be connected together at pins. burst (pin 4): burst mode logic input. a logic high on the burst pin operates the charge pump in low noise constant frequency. a logic low will operates the charge pump in burst mode operation for higher efficiency at low output currents. the burst pin has a 1a (typical) pull-down current to ground and can tolerate 38v inputs allowing it to be pin-strapped to v in . sel1 (pin 5): logic input pin. see table 1 for sel1/sel2 operating logic. the sel1 pin has a 1a (typical) pull-down current to ground and can tolerate 38v inputs allowing it to be pin-strapped to v in . sel2 (pin 6): logic input pin. see table 1 for sel1/sel2 operating logic. the sel2 pin has a 1a (typical) pull-down current to ground and can tolerate 38v inputs allowing it to be pin-strapped to v in . table 1: v out operating modes sel2 sel1 mode low low shutdown low high adjustable v out high low fixed 5v high high fixed 3.3v outs/adj (pin 7): v out sense / adjust input pin. this pin acts as v out sense (outs) for 5v or 3.3v fixed outputs and adjust (adj) for adjustable output through external feedback. the adj pin servos to 1.2v when the device is enabled in adjustable mode. (outs / adj are selected by sel1 and sel2 pins; see table 1) pgood (pin 8): power good open drain logic output. the pgood pin goes high impedance when v out is about 6% of its final operating voltage. pgood is intended to be pulled up to v out or other low voltage supply with an external resistor. c + (pin 9): flying capacitor positive connection. v out (pin 10): charge pump output voltage. if v in drops below its uvlo threshold, the connection from v in be - comes high impedance with no reverse leakage from v out to v in . v out regulation only takes place above the uvlo threshold. v out can be programmed to regulate from 2.5v to 5v. c C (pin 11): flying capacitor negative connection. gnd (pin 12, exposed pad pin 13): ground. the exposed package pad is ground and must be soldered to the pc board ground plane for proper functionality and for rated thermal performance. typical performance characteristics t a = 25c, unless otherwise noted. 5v output transient response 3.3v output transient response 200ma i out 5ma low noise ac 50mv/div burst mode operation ac 50mv/div v in = 12v v out = 5v 3245 g19 150ma i out 5ma low noise ac 50mv/div burst mode operation ac 50mv/div v in = 12v v out = 3.3v 3245 g20 ltc3245 3245f
7 for more information www.linear.com/ltc3245 simplified block diagram v in sel1 sel2 v out outs/adj burst 3245 bd burst detected charge pump en c + c ? mux adj 3.3v 5v sd pgood 1.2v ? + overtemperature 1.14v ? + gnd ltc3245 3245f
8 for more information www.linear.com/ltc3245 applications information general operation the ltc3245 uses switched capacitor based dc/dc conversion to provide the efficiency advantages associ - ated with inductor based circuits as well as the cost and simplicity advantages of a linear regulator. the ltc3245s unique constant frequency architecture provides a low noise regulated output as well as lower input noise than conventional switch capacitor charge pump regulators. the ltc3245 uses an internal switch network and fractional conversion ratios to achieve high efficiency and regula - tion over widely varying v in and output load conditions. internal control circuitry selects the appropriate conver - sion ratio based on v in and load conditions. the device has three possible conversion modes: 2:1 step-down mode, 1:1 step-down mode and 1:2 step-up mode. only one external flying capacitor is needed to operate in all three modes. 2:1 mode is chosen when v in is greater than two times the desired v out . 1:1 mode is chosen when v in falls between two times v out and v out . 1:2 mode is chosen when v in falls below the desired v out . an internal load current sense circuit controls the switch point of the conversion ratio as needed to maintain output regulation over all load conditions. regulation is achieved by sensing the output voltage and regulating the amount of charge transferred per cycle. this method of regulation provides much lower input and output ripple than that of conventional switched capacitor charge pumps. the constant frequency charge transfer also makes additional output or input filtering much less demanding than conventional switched capacitor charge pumps. the ltc3245 has a burst mode operation pin that allows the user to trade output ripple for better efficiency/lower quiescent current. the device has two sel pins that select the output regulation (fixed 5v, fixed 3.3v or adjustable) as well as shutdown. the device includes soft-start func - tion to limit in-rush current at startup. the device is also short-circuit and overtemperature protected. v out regulation and mode selection as shown in the simplified block diagram, the device uses a control loop to adjust the strength of the charge pump to match the current required at the output. the error signal of this loop is stored directly on the output charge storage capacitor. as the load on v out increases, v out will drop slightly increasing the amount of charge transferred until the output current matches the output load. this method of regulation applies regardless of the conversion ratio. the optimal conversion ratio is chosen based on v in , v out and output load conditions. two internal compara - tors are used to select the default conversion ratio. each comparator has an adjustable offset built in that increases (decreases) in proportion to the increasing (decreasing) output load current. in this manner, the conversion ratio switch point is optimized to provide peak efficiency over all supply and load conditions while maintaining regulation. each comparator also has built-in hysteresis to reduce the tendency of oscillating between modes when a transition point is reached. low noise vs burst mode operation burst mode operation is selected by driving the burst pin low. in burst mode operation the ltc3245 delivers a minimum amount of charge each cycle forcing v out above regulation at light output loads. when the ltc3245 detects that v out is above regulation the device stops charge transfer and goes into a low current sleep state. during this sleep state, the output load is supplied by the output capacitor. the device will remain in the sleep state until the output drops enough to require another burst of charge. burst mode operation allows the ltc3245 to achieve high efficiency even at light loads. if the output load exceeds the minimum charge transferred per cycle, then the device will operate continuously to maintain regulation. unlike traditional charge pumps whos burst current is dependant on many factors (i.e., supply, switch strength, capacitor selection, etc.), the ltc3245 burst current is regulated which helps to keep burst output ripple voltage relatively constant and is typically 50mv for c out = 10f. driving the burst pin high puts the ltc3245 in low noise operation. in low noise operation the minimum amount of charge delivered each cycle and sleep hysteresis are reduced compared to burst mode operation. this results in lower burst output ripple (typically 20mv for c out = 10f) and will transition to constant frequency operation at lighter loads. ltc3245 3245f
9 for more information www.linear.com/ltc3245 applications information short-circuit/thermal protection the ltc3245 has built-in short-circuit current limiting as well as overtemperature protection. during short-circuit conditions the device will automatically limit the output current. the ltc3245 has thermal protection that will shut down the device if the junction temperature exceeds the overtemperature threshold (typically 175c). thermal shutdown is included to protect the ic in cases of exces - sively high ambient temperatures, or in cases of excessive power dissipation inside the ic. the charge transfer will reactivate once the junction temperature drops back to approximately 165c. when the thermal protection is active, the junction tem - perature is beyond the specified operating range. thermal protection is intended for momentary overload conditions outside normal operation. continuous operation above the specified maximum operating junction temperature may impair device reliability. soft-start operation to prevent excessive current flow at v in during start-up, the ltc3245 has built-in soft-start circuitry. soft-start is achieved by increasing the amount of current available to the output charge storage capacitor linearly over a period of approximately 500s. soft-start is enabled whenever the device is brought out of shutdown, and is disabled shortly after regulation is achieved. programming the output voltage (outs/adj pin) the ltc3245 output voltage programming is very flexible offering a fixed 3.3v output, fixed 5v output as well as adjustable output that is programmed through an external resistor divider. the desired output regulation method is selected through the set pins. for a fixed output simply short outs (outs/adj pin) to v out as shown in figure 1. fixed 3.3v operation is enabled by driving both sel1 and sel2 pins high, while fixed 5v operating is selected by driving sel2 high with sel1 low. driving both sel1 and sel2 low shuts down the device causing v out to go high impedance. figure 1: fixed output operation figure 2: adjustable output operation adjustable output programming is accomplished by con - necting adj (outs/adj pin) to a resistor divider between v out and gnd as shown in figure 2. adjustable operation is enabled by driving sel1 high and sel2 low. driving both sel1 and sel2 low shuts down the device causing v out to go high impedance. v out outs gnd ltc3245 v out fixed 3.3v or fixed 5v 3245 f01 c out v out adj gnd ltc3245 v out 3245 f02 c out r a r b 1.2v ( ) 1+ r a r b using adjustable operation the output (v out ) can be programmed to regulate from 2.5v to 5v. the limited programming range provides the required v out operating voltage without overstressing the v out pin. the desired adjustable output voltage is programmed by solving the following equation for r a and r b : r a r b = v o u t 1.2v C 1 select a value for r b in the range of 1k to 1m and solve for r a . note that the resistor divider current adds to the total no load operating current. thus a larger value for r b will result in lower operating current. ltc3245 3245f
10 for more information www.linear.com/ltc3245 applications information 2:1 step-down charge pump operation when the input supply is greater than about two times the output voltage, the ltc3245 will operate in 2:1 step- down mode. charge transfer happens in two phases. on the first phase the flying capacitor (c fly ) is connected between v in and v out . on this phase c fly is charged up and current is delivered to v out . on the second phase the flying capacitor (c fly ) is connected between v out and gnd. the charge stored on c fly during the first phase is transferred to v out on the second phase. when in 2:1 step-down mode the input current will be approximately half of the total output current. the efficiency ( ) and chip power dissipation (p d ) in 2:1 are approximately: ? p o u t p i n = v o u t ? i o u t v i n ? 1 2 i o u t = 2 v o u t v i n p d = v i n 2 ? v o u t ? ? ? ? ? ? i o u t 1:1 step-down charge pump operation when the input supply is less than about two times the output voltage but more than the programmed output voltage, the ltc3245 will operate in 1:1 step-down mode. this method of regulation is very similar to a linear regula - tor. charge is delivered directly from v in to v out through most of the oscillator period. the charge transfer is briefly interrupted at the end of the period. the interruption in charge transfer improves stability and transient response. when in 1:1 step-down mode the input current will be approximately equal to the total output current. thus efficiency ( ) and chip power dissipation (p d ) in 1:1 are approximately: ? p o u t p i n = v o u t t i o u t v i n t i o u t = v o u t v i n p d = v i n C v o u t ( ) i o u t 1:2 step-up charge pump operation when the input supply is less than the output voltage the ltc3245 will operate in 1:2 step-up mode. charge trans - fer happens in two phases. on the first phase the flying capacitor (c fly ) is connected between v in and gnd. on this phase c fly is charged up. on the second phase the flying capacitor (c fly ) is connected between v in and v out and the charge stored on c fly during the first phase is transferred to v out . when in 1:2 step-up mode the input current will be approximately twice the total output cur - rent. thus efficiency ( ) and chip power dissipation (p d ) in 1:2 are approximately: ? p o u t p i n = v o u t t i o u t v i n t 2 i o u t = v o u t 2v i n p d = 2v i n C v o u t ( ) i o u t due to the limited drive in 1:2 step-up mode the device always operates in burst mode operation when operating at this conversion ratio. this is done to delay the onset of dropout at the expense of more output ripple. pgood output operation the ltc3245 includes an open-drain power good (pgood) output pin. if the chip is in shutdown or under uvlo con - ditions (v in < 2.2v typical), pgood is low impedance to ground. pgood becomes high impedance when v out rises to 95% (typical) of its regulation voltage. pgood stays high impedance until v out is shut down or drops below the pgood threshold (91% typical) due to an overload condition. a pull-up resistor can be inserted between pgood and a low voltage positive logic supply (such as v out ) to signal a valid power good condition. the use of a large pull-up resistor on pgood and a capacitor placed between pgood and gnd can be used to delay the pgood signal if desired. v out ripple and capacitor selection the type and value of capacitors used with the ltc3245 determine several important parameters such as regula - tor control loop stability, output ripple and charge pump ltc3245 3245f
11 for more information www.linear.com/ltc3245 applications information strength. the value of c out directly controls the amount of output ripple for a given load current when operating in constant frequency mode. increasing the size of c out will reduce the output ripple. to reduce output noise and ripple, it is suggested that a low esr (equivalent series resistance < 0.1) ceramic capacitor (10f or greater) be used for c out . tantalum and aluminum capacitors can be used in parallel with a ceramic capacitor to increase the total capacitance but are not recommended to be used alone because of their high esr. both the style and value of c out can significantly affect the stability of the ltc3245. as shown in the block diagram, the device uses a control loop to adjust the strength of the charge pump to match the current required at the output. the error signal of this loop is stored directly on the output charge storage capacitor. the charge storage capacitor also serves to form the dominant pole for the control loop. to prevent ringing or instability it is important for the output capacitor to maintain at least 4f of capacitance over all conditions (see ceramic capacitor selection guidelines). likewise excessive esr on the output capacitor will tend to degrade the loop stability of the ltc3245. the closed loop output resistance of the device is designed to be 0.3 for a 5v output and 0.2 for a 3.3v output. for a 250ma load current change, the output voltage will change by about 1.5%v. if the output capacitor has more esr than the closed loop impedance, the closed loop frequency response will cease to roll off in a simple 1-pole fashion and poor load transient response or instability could result. ceramic capacitors typically have exceptional esr perfor - mance, and combined with a tight board layout, should yield excellent stability and load transient performance. v in capacitor selection the constant frequency architecture used by the ltc3245 makes input noise filtering much less demanding than with conventional regulated charge pumps. depending on the mode of operation the input current of the ltc3245 can vary from i out to 0ma on a cycle-by-cycle basis. low esr will reduce the voltage steps caused by changing input current, while the absolute capacitor value will determine the level of ripple. the total amount and type of capacitance necessary for input bypassing is very dependant on the applied source impedance as well as existing bypassing already on the v in node. for optimal input noise and ripple reduction, it is recommended that a low esr ceramic capacitor be used for c in bypassing. an electrolytic or tantalum capacitor may be used in parallel with the ce - ramic capacitor on c in to increase the total capacitance, but due to the higher esr it is not recommended that an electrolytic or tantalum capacitor be used alone for input bypassing. the ltc3245 will operate with capacitors less than 1f but depending on the source impedance input noise can feed through to the output causing degraded performance. for best performance 1f or greater total capacitance is suggested for c in . flying capacitor selection warning: a polarized capacitor such as tantalum or alumi - num should never be used for the flying capacitors since the voltage can reverse upon start-up of the ltc3245. ceramic capacitors should always be used for the flying capacitors. the flying capacitors control the strength of the charge pump. in order to achieve the rated output current, it is necessary for the flying capacitor to have at least 0.4f of capacitance over operating temperature with a bias voltage equal to the programmed v out (see ceramic capacitor selection guidelines). if only 100ma or less of output current is required for the application, the flying capacitor minimum can be reduced to 0.15f. the voltage rating of the ceramic capacitor should be v out + 1v or greater. ceramic capacitor selection guidelines capacitors of different materials lose their capacitance with higher temperature and voltage at different rates. for example, a ceramic capacitor made of x5r or x7r material will retain most of its capacitance from C40c to 85c, whereas a z5u or y5v style capacitor will lose considerable capacitance over that range (60% to 80% loss typical). z5u and y5v capacitors may also have a very strong voltage coefficient, causing them to lose an additional 60% or more of their capacitance when the rated voltage is applied. therefore, when comparing different capacitors, it is often more appropriate to compare the amount of achievable capacitance for a given case size ltc3245 3245f
12 for more information www.linear.com/ltc3245 applications information rather than discussing the specified capacitance value. for example, over rated voltage and temperature conditions, a 4.7f, 10v, y5v ceramic capacitor in an 0805 case may not provide any more capacitance than a 1f, 10v, x5r or x7r available in the same 0805 case. in fact, over bias and temperature range, the 1f, 10v, x5r or x7r will provide more capacitance than the 4.7f, 10v, y5v. the capacitor manufacturers data sheet should be consulted to determine what value of capacitor is needed to ensure minimum capacitance values are met over operating temperature and bias voltage. below is a list of ceramic capacitor manufacturers and how to contact them: manufacturer website avx www.avxcorp.com kemet www.kemet.com murata www.murata.com taiyo yuden www.t-yuden.com tdk www.tdk.com layout considerations due to the high switching frequency and transient cur - rents produced by the ltc3245, careful board layout is necessary for optimal performance. a true ground plane and short connections to all capacitors will optimize performance, reduce noise and ensure proper regulation over all conditions. when using the ltc3245 with an external resistor divider it is important to minimize any stray capacitance to the adj (outs/adj pin) node. stray capacitance from adj to c + or c C can degrade performance significantly and should be minimized and/or shielded if necessary. thermal management the on chip power dissipation in the ltc3245 will cause the junction to ambient temperature to rise at rate of 40c/w or more. to reduce the maximum junction temperature, a good thermal connection to the pc board is recommended. connecting the die paddle (pin 13) with multiple vias to a large ground plane under the device can reduce the thermal resistance of the package and pc board considerably. poor board layout and failure to connect the die paddle (pin 13) to a large ground plane can result in thermal junction to ambient impedance well in excess of 40c/w. because of the wide input operating range it is possible to exceed the specified operating junction temperature and even reach thermal shutdown. figure 3 shows the avail - able output current vs temperature to ensure the 150c operating junction temperature is not exceed for input voltages less than 20v. figure 3 assumes worst-case operating conditions. under some operating conditions the part can supply more current than shown without exceeding the 150c operating junc - tion temperature. when operating outside the constraints of figure 3 it is the responsibility of the user to calculate worst-case operating conditions (temperature and power) to make sure the ltc3245s specified operating junction temperature is not exceeded for extended periods of time. the 2:1 step-down, 1:1 step-down, and 1:2 step-up charge pump operation sections provide equations for calculating power dissipation (p d ) in each mode. for example, if it is determined that the maximum power dissipation (p d ) is 1.2w under normal operation, then the junction to ambient temperature rise will be: junction to ambient = 1.2w ? 40c/w = 48c thus, the ambient temperature under this condition cannot exceed 102c if the junction temperature is to remain below 150c and if the ambient temperature exceeds about 127c the device will cycle in and out of the thermal shutdown. figure 3. available output current vs temperature temperature (c) 70 0 i out (ma) 50 150 100 250 200 300 80 3245 f03 90 100 110 130 120 150 140 v in < 20v ltc3245 3245f
13 for more information www.linear.com/ltc3245 typical applications regulated 5v low noise output high efficiency 3.3v microcontroller supply from 9v alkaline (with power-on reset delay) c + c ? v in burst sel2 sel1 v out outs/adj pgood gnd ltc3245 12v lead acid battery v out = 5v i vout up to 250ma 3245 ta02 1f 1f 10f 100k + wide input range low noise 3.6v supply c + c ? v in sel1 sel2 burst v out outs/adj pgood gnd ltc3245 9v alkaline battery v out = 3.3v 3245 ta03 v dd por gnd 1f 1f microcontroller 10f 1f 510k + c + c ? v in burst sel1 sel2 v out outs/adj pgood gnd ltc3245 v in = 2.7v to 38v v out = 3.6v 3245 ta04 1f 1f 10f 499k 249k ltc3245 3245f
14 for more information www.linear.com/ltc3245 package description mse package 12-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1666 rev f) msop (mse12) 0911 rev f 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.22 ?0.38 (.009 ? .015) typ 0.86 (.034) ref 0.650 (.0256) bsc 12 12 11 10 9 8 7 7 detail ?b? 1 6 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane recommended solder pad layout bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 1 2 3 4 5 6 3.00 0.102 (.118 .004) (note 4) 0.406 0.076 (.016 .003) ref 4.90 0.152 (.193 .006) detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc mse package 12-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1666 rev f) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. ltc3245 3245f
15 for more information www.linear.com/ltc3245 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description de/ue package 12-lead plastic dfn (4mm 3mm) (reference ltc dwg # 05-08-1695 rev d) 4.00 0.10 (2 sides) 3.00 0.10 (2 sides) note: 1. drawing proposed to be a variation of version (wged) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.70 0.10 0.75 0.05 r = 0.115 typ r = 0.05 typ 2.50 ref 1 6 12 7 pin 1 notch r = 0.20 or 0.35 45 chamfer pin 1 top mark (note 6) 0.200 ref 0.00 ? 0.05 (ue12/de12) dfn 0806 rev d 2.50 ref recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 2.20 0.05 0.70 0.05 3.60 0.05 package outline 3.30 0.10 0.25 0.05 0.50 bsc 1.70 0.05 3.30 0.05 0.50 bsc 0.25 0.05 please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. ltc3245 3245f
16 for more information www.linear.com/ltc3245 ? linear technology corporation 2013 lt 0313 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltc3245 related parts typical application part number description comments ltc1751-3.3/ ltc1751-5 100ma, 800khz regulated doubler v in : 2v to 5v, v out(max) = 3.3v/5v, i q = 20a, i sd < 2a, ms8 package ltc1983-3/ ltc1983-5 100ma, 900khz regulated inverter v in : 3.3v to 5.5v, v out(max) = C3v/C5v, i q = 25a, i sd < 2a, thinsot? package ltc3200-5 100ma, 2mhz low noise, doubler/ white led driver v in : 2.7v to 4.5v, v out(max) = 5v, i q = 3.5ma, i sd < 1a, thinsot package ltc3202 125ma, 1.5mhz low noise, fractional white led driver v in : 2.7v to 4.5v, v out(max) = 5.5v, i q = 2.5ma, i sd < 1a, dfn, ms packages ltc3204-3.3/ ltc3204b-3.3/ ltc3204-5/ ltc3204b-5 low noise, regulated charge pumps in (2mm 2mm) dfn package v in : 1.8v to 4.5v (ltc3204b-3.3), 2.7v to 5.5v (ltc3204b-5), i q = 48a, b version without burst mode operation, 6-lead (2mm 2mm) dfn package ltc3440 600ma (i out ) 2mhz synchronous buck-boost dc/dc converter 95% efficiency, v in : 2.5v to 5.5v, v out(min) = 2.5v, i q = 25a, i sd 1a, 10-lead ms package ltc3441 high current micropower 1mhz synchronous buck-boost dc/dc converter 95% efficiency, v in : 2.5v to 5.5v, v out(min) = 2.5v, i q = 25a, i sd 1a, dfn package ltc3443 high current micropower 600khz synchronous buck-boost dc/dc converter 96% efficiency, v in : 2.4v to 5.5v, v out(min) = 2.4v, i q = 28a, i sd < 1a, dfn package ltc3240-3.3/ ltc3240-2.5 3.3v/2.5v step-up/step-down charge pump dc/dc converter v in : 1.8v to 5.5v, v out(max) = 3.3v / 2.5v, i q = 65a, i sd < 1a, (2mm 2mm) dfn package ltc3260 low noise dual supply inverting charge pump v in range: 4.5v to 32v, i q = 100a, 100ma charge pump, 50ma positive ldo, 50ma negative ldo ltc3261 high voltage low i q inverting charge pump v in range: 4.5v to 32v, i q = 60a, 100ma charge pump c + c ? v in sel2 burst sel1 v out outs/adj pgood gnd ltc3245 4 aa v out = 5v i vout up to 250ma 3245 ta05 1f 12v to 24v 1f 10f + + + + wide v in 5v supply with battery backup ltc3245 3245f

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